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Delete unused code, cpuinfo.{h,cc}.

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BUG=webrtc:6424

Review-Url: https://codereview.webrtc.org/2385053004
Cr-Commit-Position: refs/heads/master@{#14538}
This commit is contained in:
nisse 2016-10-05 23:44:40 -07:00 committed by Commit bot
parent daf88b1cbf
commit 4e8baf46a7
5 changed files with 0 additions and 183 deletions
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2
webrtc/media/BUILD.gn
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@ -52,8 +52,6 @@ rtc_static_library("rtc_media") {
"base/audiosource.h",
"base/codec.cc",
"base/codec.h",
"base/cpuid.cc",
"base/cpuid.h",
"base/cryptoparams.h",
"base/device.h",
"base/hybriddataengine.h",

63
webrtc/media/base/cpuid.cc
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@ -1,63 +0,0 @@
/*
* Copyright (c) 2011 The WebRTC project authors. All Rights Reserved.
*
* Use of this source code is governed by a BSD-style license
* that can be found in the LICENSE file in the root of the source
* tree. An additional intellectual property rights grant can be found
* in the file PATENTS. All contributing project authors may
* be found in the AUTHORS file in the root of the source tree.
*/
#include "webrtc/media/base/cpuid.h"
#include "libyuv/cpu_id.h"
namespace cricket {
bool CpuInfo::TestCpuFlag(int flag) {
return libyuv::TestCpuFlag(flag) ? true : false;
}
void CpuInfo::MaskCpuFlagsForTest(int enable_flags) {
libyuv::MaskCpuFlags(enable_flags);
}
// Detect an Intel Core I5 or better such as 4th generation Macbook Air.
bool IsCoreIOrBetter() {
#if defined(__i386__) || defined(__x86_64__) || \
defined(_M_IX86) || defined(_M_X64)
uint32_t cpu_info[4];
libyuv::CpuId(0, 0, &cpu_info[0]); // Function 0: Vendor ID
if (cpu_info[1] == 0x756e6547 && cpu_info[3] == 0x49656e69 &&
cpu_info[2] == 0x6c65746e) { // GenuineIntel
// Detect CPU Family and Model
// 3:0 - Stepping
// 7:4 - Model
// 11:8 - Family
// 13:12 - Processor Type
// 19:16 - Extended Model
// 27:20 - Extended Family
libyuv::CpuId(1, 0, &cpu_info[0]); // Function 1: Family and Model
int family = ((cpu_info[0] >> 8) & 0x0f) | ((cpu_info[0] >> 16) & 0xff0);
int model = ((cpu_info[0] >> 4) & 0x0f) | ((cpu_info[0] >> 12) & 0xf0);
// CpuFamily | CpuModel | Name
// 6 | 14 | Yonah -- Core
// 6 | 15 | Merom -- Core 2
// 6 | 23 | Penryn -- Core 2 (most common)
// 6 | 26 | Nehalem -- Core i*
// 6 | 28 | Atom
// 6 | 30 | Lynnfield -- Core i*
// 6 | 37 | Westmere -- Core i*
const int kAtom = 28;
const int kCore2 = 23;
if (family < 6 || family == 15 ||
(family == 6 && (model == kAtom || model <= kCore2))) {
return false;
}
return true;
}
#endif
return false;
}
} // namespace cricket

59
webrtc/media/base/cpuid.h
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@ -1,59 +0,0 @@
/*
* Copyright (c) 2011 The WebRTC project authors. All Rights Reserved.
*
* Use of this source code is governed by a BSD-style license
* that can be found in the LICENSE file in the root of the source
* tree. An additional intellectual property rights grant can be found
* in the file PATENTS. All contributing project authors may
* be found in the AUTHORS file in the root of the source tree.
*/
#ifndef WEBRTC_MEDIA_BASE_CPUID_H_
#define WEBRTC_MEDIA_BASE_CPUID_H_
#include "webrtc/base/constructormagic.h"
namespace cricket {
class CpuInfo {
public:
// The following flags must match libyuv/cpu_id.h values.
// Internal flag to indicate cpuid requires initialization.
static const int kCpuInit = 0x1;
// These flags are only valid on ARM processors.
static const int kCpuHasARM = 0x2;
static const int kCpuHasNEON = 0x4;
// 0x8 reserved for future ARM flag.
// These flags are only valid on x86 processors.
static const int kCpuHasX86 = 0x10;
static const int kCpuHasSSE2 = 0x20;
static const int kCpuHasSSSE3 = 0x40;
static const int kCpuHasSSE41 = 0x80;
static const int kCpuHasSSE42 = 0x100;
static const int kCpuHasAVX = 0x200;
static const int kCpuHasAVX2 = 0x400;
static const int kCpuHasERMS = 0x800;
// These flags are only valid on MIPS processors.
static const int kCpuHasMIPS = 0x1000;
static const int kCpuHasMIPS_DSP = 0x2000;
static const int kCpuHasMIPS_DSPR2 = 0x4000;
// Detect CPU has SSE2 etc.
static bool TestCpuFlag(int flag);
// For testing, allow CPU flags to be disabled.
static void MaskCpuFlagsForTest(int enable_flags);
private:
RTC_DISALLOW_IMPLICIT_CONSTRUCTORS(CpuInfo);
};
// Detect an Intel Core I5 or better such as 4th generation Macbook Air.
bool IsCoreIOrBetter();
} // namespace cricket
#endif // WEBRTC_MEDIA_BASE_CPUID_H_

57
webrtc/media/base/cpuid_unittest.cc
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@ -1,57 +0,0 @@
/*
* Copyright (c) 2011 The WebRTC project authors. All Rights Reserved.
*
* Use of this source code is governed by a BSD-style license
* that can be found in the LICENSE file in the root of the source
* tree. An additional intellectual property rights grant can be found
* in the file PATENTS. All contributing project authors may
* be found in the AUTHORS file in the root of the source tree.
*/
#include "webrtc/media/base/cpuid.h"
#include <iostream>
#include "webrtc/base/basictypes.h"
#include "webrtc/base/gunit.h"
#include "webrtc/base/systeminfo.h"
TEST(CpuInfoTest, CpuId) {
LOG(LS_INFO) << "ARM: "
<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasARM);
LOG(LS_INFO) << "NEON: "
<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasNEON);
LOG(LS_INFO) << "X86: "
<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasX86);
LOG(LS_INFO) << "SSE2: "
<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE2);
LOG(LS_INFO) << "SSSE3: "
<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSSE3);
LOG(LS_INFO) << "SSE41: "
<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE41);
LOG(LS_INFO) << "SSE42: "
<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE42);
LOG(LS_INFO) << "AVX: "
<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasAVX);
bool has_arm = cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasARM);
bool has_x86 = cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasX86);
EXPECT_FALSE(has_arm && has_x86);
}
TEST(CpuInfoTest, IsCoreIOrBetter) {
bool core_i_or_better = cricket::IsCoreIOrBetter();
// Tests the function is callable. Run on known hardware to confirm.
LOG(LS_INFO) << "IsCoreIOrBetter: " << core_i_or_better;
// All Core I CPUs have SSE 4.1.
if (core_i_or_better) {
EXPECT_TRUE(cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE41));
EXPECT_TRUE(cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSSE3));
}
// All CPUs that lack SSE 4.1 are not Core I CPUs.
if (!cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE41)) {
EXPECT_FALSE(core_i_or_better);
}
}

2
webrtc/media/media.gyp
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@ -31,8 +31,6 @@
'base/audiosource.h',
'base/codec.cc',
'base/codec.h',
'base/cpuid.cc',
'base/cpuid.h',
'base/cryptoparams.h',
'base/device.h',
'base/hybriddataengine.h',